Design Verification Engineer Job Openings in Bangalore 2025!!!
Qualcomm announced job vacancy for the post of Design Verification Engineer.The place of posting will be at Bangalore.Candidates who have completed Graduate / Engineering / Post Graduate with Fresher / Experience are eligible to apply. More details about qualifications, job description and roles & responsibilities are as follows
| Name of the Company | Qualcomm |
| Required Qualifications | Graduate / Post Graduate |
| Skills | ASIC design verification, SystemVerilog / UVM, etc.., |
| Category | Engineering |
| Work Type | Onsite |
Join Qualcomm’s design verification team in verifying the Digital Low Power IPs for exciting products targeted for 5G, AI/ML, compute, IOT, and automotive applications. The team is responsible for the complete design verification lifecycle (including Functional, Low Power Verification, Gate Simulation, Formal Verification) from system-level concept to tape out and post-silicon support.
Θ Positions: Design Verification Engineer
Θ Job Location: Bangalore
Θ Salary: As Per Company Norms
Θ Job Type: Full Time
Θ Requisition ID: 3075484
Roles and Responsibilities:
- Define pre-silicon and post-silicon testplans based on design specs and using applicable standards working closely with design team.
- Architect and develop the testbench using advanced verification methodology such as SystemVerilog/UVM, Low power verification, Formal verification and Gate level simulation to ensure high design quality.
- Author assertions in SVA, develop testcases, coverage models, debug and ensure coverage closure.
- Work with digital design, analog circuit design, modeling, controller/subsystem, & SoC integration teams to complete the successful IP level verification, integration into subsystem and SoC, and post-silicon validation.
Required Skills & Qualifications:
- Master’s/Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.
- 2+ years ASIC design verification, or related work experience.
- Knowledge of a HVL methodology like SystemVerilog/UVM.
- Experience working with various ASIC simulation/formal tools such as VCS, Xcellium/NCsim, Modelsim/Questa, VCFormal, Jaspergold, 0In and others.
Preferred Qualifications:
- Experience with Low power design verification, Formal verification and Gate level simulation.
- Knowledge of standard protocols such as Power Management Flows, PCIe, USB, MIPI, LPDDR, etc. will be a value add
- Experience in scripting languages (Python, or Perl).
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